Home > Community

	Login with a Cadence account.
Not a member yet? Create a permanent login account to make interactions with Cadence more conveniennt. Register \| Membership benefits

	ARM, Chartered, IBM and Samsung Collaborate to Enable Energy-Efficient 32nm and 28nm Systems-on-Chip
	EE Times

	Altera and SLS Offer Commercially Supported Pre-Packaged uCLinux for Nios II Embedded Processor
	Business Wire

	Xilinx at Forum de L'Electronique 2008
	PRNewswire

Email
Social Web

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Send yourself a copy

Cadence RSS Feeds

Intro copy of the newsletter section here, some intro copy of the newsletter. Instruction of how to subscribe to this newsletter.

Contact Us

Cadence Contacts

Global Office Locator
Find Offices worldwide »

Sales Inquiry
Request for Product information »
Cadence Channel Partners »

Corporate Headquarters
Cadence Design Systems, Inc.
2655 Seely Avenue
San Jose, CA 95134
Phone: 408.943.1234

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Send Yourself A Copy

Community

Blog
Forum
Resources

	e Running Inside VCS Anniversary Updates? By Joseph Hupcey III on November 20, 2008 It's been a year since I heard the first solid report about Synopsys supporting the e language (IEEE 1647-2008) natively inside VCS. (Note a key distinction here: VCS has interfaced with e language and/or Specman-driven testbenches for years -- that's... Read more » Comments (0) Filed under: Testbench simulation, IES, multi-language, Incisive Enterprise Simulator (IES), e, Specman, IEEE 1647

	When Green Chips Turn Brown By Jeffrey Flieder on November 20, 2008 I went to New York City last weekend and went to see a Broadway show called Avenue Q. It's a very adult adaption of Sesame Street (sort of). Before you grab a bus, plane, or train to NYC to see this show with your kids, be forewarned. Puppets aside... Read more » Comments (0) Filed under: Logic Design, incyte, low power design, chip estimate

	Tapeout! By Kari Summers on November 20, 2008 With an early December tapeout looming, I've found myself too busy to write a post this week. But then I thought, "Why not write about tapeout?". Here are some things I try to do during a project so that those last few weeks before a deadline... Read more » Comments (0) Filed under: digital Implementationg, DRC, ECO, LVS, LEC, tapeout

	What's Good About Advanced Plating Bar Checks - Check out the SPB16.2 Release and See! By Gerald "Jerry" Grzenia on November 19, 2008 New functionality has been added to the SPB16.2 Allegro Advanced Package Designer (APD) suite of tools to support Advanced Plating Bar Checks. The plating bar check command has existed inside of the APD and SiP tools for many years. However, as the design... Read more » Comments (0) Filed under: PCB design, Allegro, SPB 16.2, advanced plating bar check, advanced package designer, BGA

	Virtualization and Verification With Posedge Software By Jason Andrews on November 19, 2008 Posedge Software is a Cadence Verification Alliance Member with skills in two of my favorite areas: virtualization and embedded software verification. Posedge has worked with ISX as far back as 2006. Besides the fact that they are skilled in verification... Read more » Comments (0) Filed under: System Design and Verification, QEMU, OVP, open virtual platforms, posedge

	WIN a Wii! Register for Dec.11 Event: "Conformal Customer Appreciation" By Kenneth Chang on November 18, 2008 Win a Wii and get other freebies too! 10 great years of Conformal (or Verplex to some people still ;) ) ... unbelievable to see how it has grown from a tiny cool start-up in San Jose. Because of awesome customers like you, making Conformal the golden... Read more » Comments (0) Filed under: Logic Design, conformal, event

View older posts »

Visit the community forums »

There are 75 guest(s) and 1 member(s) online:
jtyjtuituituit

Most Active Users

Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

Share

Subscribe

Contact Us

Community